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Member of Technical Staff - Low Level & Kernels Capabilities

Preference Model
Toronto, ON

Postuler dès maintenant

Détails du poste

Temps plein
De 200 000 $ à 350 000 $ par an

Profil recherché

FPGA
Noyaux
C++
C
Apprentissage automatique
Langage d'assemblage
Python

Description complète du poste

About Us

Preference Model is building automated ML research engineering.

Existing frontier models are brittle when applied to real-world ML tasks. The present bottleneck is the lack of high-quality RL training environments. Our first step is to build RL environments that reflect real-world complexity, with diverse tasks and robust reward functions.

Our founding team has previous experience on Anthropic’s data team building data infrastructure, and datasets behind Claude. We are partnering with leading AI labs to push AI closer to achieving its transformative potential.

About the Role

We’re hiring experienced Machine Learning Engineers for our Low Level / Kernels Capabilities team. The Kernels team builds reinforcement learning (RL) environments at the lowest layers of the stack. Think GPU and accelerator kernels, vector ISAs, codec and crypto primitives, FPGA work, and more. These are the domains where frontier models are weakest, niche paradigms, hardware underrepresented in training data, and open benchmarks that show models lagging.

This role blends research and engineering. It will require you to both develop novel approaches and realize them in code. You will own environments end-to-end: choose the domain, design the tasks, build the scoring and infrastructure, and harden it against reward hacking. Because the tasks run so low in the stack, robust scoring and sandboxing are a real part of the job, making sure a model can't game the timer instead of writing the kernel.

What You Will Do:

Design and build low level / kernel-focused reinforcement learning (RL) environments that target a specified model and difficulty distribution.
Choose which environments are worth building. A strong kernel environment hits several marks:
- Targets a niche or genuinely hard domain;
- Exercises real hardware features (tiling, streaming, async copy, vector ISAs);
- Interesting hardware or simulators (FPGAs, novel accelerators, gem5);
- Research-motivated, grounded in benchmarks where models lag;
- Has a recognized reference to measure against (cuBLAS/FFTW/OpenSSL/etc.);
- Scales into many diverse tasks from a single design.
Build correctness and performance scoring that's deterministic and can't be gamed: the objective is clear, and the only way to hit it is to actually write the kernel.

What We are Looking For (Qualifications):

Strong low-level/systems engineering: fluent in C / C++ / CUDA (or an equivalent kernel language), comfortable dropping to assembly when it matters.
Strong, engineering-quality Python across your prior work, writing production code, automation and deployment scripts, data analysis and plotting (not notebook-only).
Hardware-aware coding: you write with the silicon in mind, considering memory hierarchy, occupancy, data movement, parallelism, latency vs throughput etc.
Kernel development experience: you write kernels and optimize them iteratively against a profiler.
An adversarial mindset: you turn fuzzy goals into robust, ungameable scoring, and you ask "how would a model cheat this?"
Hands-on work with LLMs
Ownership and autonomy: you build, debug, and ship end-to-end with minimal supervision.

You may be a good fit if you also:

Have shipped a kernel that approached SOTA and can explain the remaining gap.
Have depth in a niche hardware target or ISA: FPGA/HLS, RISC-V Vector, DSPs, SIMD/AVX, TPUs.
Have depth in an adjacent discipline; HPC/heterogeneous clusters, hardware design (RTL/HDL, HLS), compilers and kernel toolchains (MLIR/LLVM, Mojo, Triton, gem5), or formal verification (Lean, Coq, SMT).
Read performance and architecture papers and turn them into running code.
Have open-source contributions others rely on.
Have a strong competitive-programming background (ideally in a low-level language).
Have built RL environments, agent harnesses, or evaluation infrastructure.

What We Offer:

Competitive cash and equity compensation (>90th percentile)
Ownership and autonomy in a fast moving startup environment
Opportunity to work with top machine learning engineers
Health, vision, dental, benefits
401K match
Lunch provided everyday onsite
Weekly snack orders
Visa sponsorship & relocation support available

We value diverse perspectives and experiences. If you're excited about this role but don't check every box, we still encourage you to apply.

Compensation Range: $200K - $350K

Postuler dès maintenant

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Je souhaite recevoir la dernière alerte emploi pour les postes de ce type : fpga design engineer (toronto, on)

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